Peer-reviewed veterinary case report
van der Waals dielectrics for threshold engineering in two-dimensional field effect transistors.
- Year:
- 2026
- Authors:
- Sen D et al.
- Affiliation:
- Penn State University · United States
Abstract
Two-dimensional (2D) semiconductors are promising for next-generation field-effect transistors (FETs), but their integration into complementary-metal-oxide-semiconductors (CMOS) logic is hindered by improper threshold voltages ( Vth ), leading to excessive power consumption. While past efforts have focused on improving gate electrostatics and near-ideal subthreshold swing ( SS ), systematic Vth engineering in 2D FETs remains unexplored. Here, we investigate high-κ van der Waals (vdW) dielectrics including metal oxyhalides such as LaOBr, BiOBr, and BiOCl, and bimetallic thiophosphates such as LiInP<sub>2</sub>S<sub>6</sub> (LIPS), LiInP<sub>2</sub>Se<sub>6</sub> (LIPSe) and CuInP<sub>2</sub>S<sub>6</sub> (CIPS), and demonstrate that bimetallic thiophosphates enable programmable and non-volatile Vth tuning in both n-type monolayer MoS<sub>2</sub> and p-type bilayer WSe<sub>2</sub> FETs. Leveraging ion-mediated Vth tuning, we realize 2D CMOS inverters with nearly three orders of magnitude reduction in static power while maintaining high switching speed. Combining experiments with industry-compatible SPICE modeling, we identify an optimal Vth window that minimizes power with negligible delay overhead, enabling built-in power gating and improved power-performance-area metrics without additional sleep transistors.
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Search related cases →Original publication: https://europepmc.org/article/MED/41698936